Volumio 3.703 + Pi 4 + HiFiBerry DAC2 HD

Hey @Itolo,

Whilst digging into the HifiBerry DACs I came across this thread:

Although this thread was created for a different purpose, still discusses how to upgrade eeprom on Raspberry Pi4 and 5:

Something else worth checking, based on a gut feeling rather than any science. Please post content from /data/configuration/audio_interface/alsa_controller/config.json from functioning and non-functioning scenarios.

Kind Regards,

Hi @nerd

I haven’t updated the bootloader yet

Working
Volumio OS 3.735
http://logs.volumio.org/volumio/ftwOPyd.html

volumio@volumio:~$ sudo vcgencmd bootloader_version
2024/05/17 12:26:58
version 72caf66729df313801bcefe9b1ff7099c71bb5ce (release)
timestamp 1715945218
update-time 1720552306
capabilities 0x0000007f

volumio@volumio:~$ cat /data/configuration/audio_interface/alsa_controller/config.json                           {
  "volumestart": {
    "type": "string",
    "value": "disabled"
  },
  "volumemax": {
    "type": "string",
    "value": "100"
  },
  "volumecurvemode": {
    "type": "string",
    "value": "logarithmic"
  },
  "outputdevicecardname": {
    "type": "string",
    "value": "sndrpihifiberry"
  },
  "outputdevicename": {
    "type": "string",
    "value": "HiFiBerry DAC2 HD"
  },
  "outputdevice": {
    "type": "string",
    "value": "1"
  },
  "mixer_type": {
    "type": "string",
    "value": "undefined"
  },
  "mixer": {
    "type": "string",
    "value": ""
  },
  "volumesteps": {
    "type": "string",
    "value": "1"
  }
}
volumio@volumio:~$

Not working
Volumio OS 3.735
http://logs.volumio.org/volumio/PXXmVp5.html

volumio@volumio:~$ sudo vcgencmd bootloader_version
2024/05/17 12:26:58
version 72caf66729df313801bcefe9b1ff7099c71bb5ce (release)
timestamp 1715945218
update-time 1720552306
capabilities 0x0000007f

volumio@volumio:~$ cat /data/configuration/audio_interface/alsa_controller/config.json
{
  "volumestart": {
    "type": "string",
    "value": "disabled"
  },
  "volumemax": {
    "type": "string",
    "value": "100"
  },
  "volumecurvemode": {
    "type": "string",
    "value": "logarithmic"
  },
  "outputdevicecardname": {
    "type": "string",
    "value": "sndrpihifiberry"
  },
  "outputdevicename": {
    "type": "string",
    "value": "HiFiBerry DAC2 HD"
  },
  "outputdevice": {
    "type": "string",
    "value": "1"
  },
  "mixer_type": {
    "type": "string",
    "value": "undefined"
  },
  "mixer": {
    "type": "string",
    "value": ""
  },
  "volumesteps": {
    "type": "string",
    "value": "1"
  }
}
volumio@volumio:~$


Thank you

hi @nerd

itolo@raspberrypi:~ $ sudo rpi-eeprom-update
BOOTLOADER: up to date
   CURRENT: ven 17 mag 2024, 11:26:58, UTC (1715945218)
    LATEST: ven 17 mag 2024, 11:26:58, UTC (1715945218)
   RELEASE: latest (/lib/firmware/raspberrypi/bootloader-2711/latest)
            Use raspi-config to change the release.

Thank you

Hey @Itolo,

I wonder what is happening to the i2c clock

In working and non-working scenario:

sudo cat /sys/kernel/debug/clk/clk_summary

Can you try something different - instead of a reboot, do a full power down.

Kind Regards,

I tried but the same thing happens

Not working

                               enable  prepare  protect                                duty  hardware
   clock                          count    count    count        rate   accuracy phase  cycle    enable
-------------------------------------------------------------------------------------------------------
 clk-hifiberry-dachd                  0        0        0       44100          0     0  50000         Y
 fw-clk-vec                           0        0        0           0          0     0  50000         Y
 fw-clk-pixel-bvb                     0        0        0    75000000          0     0  50000         Y
 fw-clk-m2mc                          0        0        0   120000000          0     0  50000         Y
 fw-clk-hevc                          0        0        0   250000000          0     0  50000         Y
 fw-clk-pixel                         0        0        0           0          0     0  50000         Y
 fw-clk-isp                           0        0        0   250000000          0     0  50000         Y
 fw-clk-v3d                           0        0        0   250000000          0     0  50000         Y
 fw-clk-core                          0        0        0   200000000          0     0  50000         Y
 fw-clk-arm                           0        0        0  1500000000          0     0  50000         Y
 108MHz-clock                         0        0        0   108000000          0     0  50000         Y
 27MHz-clock                          0        0        0    27000000          0     0  50000         Y
 otg                                  0        0        0   480000000          0     0  50000         Y
 osc                                  4        4        1    54000000          0     0  50000         Y
    tsens                             0        0        0     3375000          0     0  50000         Y
    otp                               0        0        0    13500000          0     0  50000         Y
    timer                             0        0        0     1000000          0     0  50000         Y
    plld                              5        5        0  3000000091          0     0  50000         Y
       plld_dsi1                      1        1        0   750000023          0     0  50000         Y
       plld_dsi0                      1        1        0    11718751          0     0  50000         Y
       plld_per                       3        3        0   750000023          0     0  50000         Y
          emmc2                       1        1        0   100000003          0     0  50000         Y
          dsi1e                       0        0        0   100000003          0     0  50000         Y
          emmc                        0        0        0   250000007          0     0  50000         Y
          uart                        1        1        0    48000001          0     0  50000         Y
       plld_core                      1        1        0   600000019          0     0  50000         Y
    pllc                              5        5        0  2592000000          0     0  50000         Y
       pllc_per                       1        1        0   648000000          0     0  50000         Y
       pllc_core2                     1        1        0    10125000          0     0  50000         Y
       pllc_core1                     1        1        0    10125000          0     0  50000         Y
       pllc_core0                     1        1        0    10125000          0     0  50000         Y
    pllb                              2        2        0  2999999988          0     0  50000         Y
       pllb_arm                       1        1        0  1499999994          0     0  50000         Y
    plla                              4        4        1  2999999988          0     0  50000         Y
       plla_ccp2                      1        1        0    11718750          0     0  50000         Y
       plla_dsi0                      1        1        0    11718750          0     0  50000         Y
       plla_core                      2        2        1   499999998          0     0  50000         Y
          h264                        0        0        0   249999999          0     0  50000         Y
          isp                         0        0        0   249999999          0     0  50000         Y
          vpu                         3        3        1   500000000          0     0  50000         Y
             fe804000.i2c_div         1        1        1      100000          0     0  50000         Y
             aux_spi2                 0        0        0   500000000          0     0  50000         N
             aux_spi1                 0        0        0   500000000          0     0  50000         N
             aux_uart                 0        0        0   500000000          0     0  50000         N
             peri_image               0        0        0   500000000          0     0  50000         Y
 dsi1p                                0        0        0           0          0     0  50000         Y
 dsi0p                                0        0        0           0          0     0  50000         Y
 dsi0e                                0        0        0           0          0     0  50000         Y
 cam1                                 0        0        0           0          0     0  50000         Y
 cam0                                 0        0        0           0          0     0  50000         Y
 dpi                                  0        0        0           0          0     0  50000         Y
 tec                                  0        0        0           0          0     0  50000         Y
 smi                                  0        0        0           0          0     0  50000         Y
 slim                                 0        0        0           0          0     0  50000         Y
 gp2                                  0        0        0           0          0     0  50000         Y
 gp1                                  0        0        0           0          0     0  50000         Y
 gp0                                  0        0        0           0          0     0  50000         Y
 dft                                  0        0        0           0          0     0  50000         Y
 aveo                                 0        0        0           0          0     0  50000         Y
 pcm                                  0        0        0           0          0     0  50000         Y
 pwm                                  0        0        0           0          0     0  50000         Y
 sdram                                0        0        0           0          0     0  50000         Y
 hsm                                  0        0        0           0          0     0  50000         Y
volumio@volumio:~$

Working

enable  prepare  protect                                duty  hardware
   clock                          count    count    count        rate   accuracy phase  cycle    enable
-------------------------------------------------------------------------------------------------------
 clk-hifiberry-dachd                  0        0        0       44100          0     0  50000         Y
 fw-clk-vec                           0        0        0           0          0     0  50000         Y
 fw-clk-pixel-bvb                     0        0        0    75000000          0     0  50000         Y
 fw-clk-m2mc                          0        0        0   120000000          0     0  50000         Y
 fw-clk-hevc                          0        0        0   250000000          0     0  50000         Y
 fw-clk-pixel                         0        0        0           0          0     0  50000         Y
 fw-clk-isp                           0        0        0   250000000          0     0  50000         Y
 fw-clk-v3d                           0        0        0   250000000          0     0  50000         Y
 fw-clk-core                          0        0        0   200000000          0     0  50000         Y
 fw-clk-arm                           0        0        0  1500000000          0     0  50000         Y
 108MHz-clock                         0        0        0   108000000          0     0  50000         Y
 27MHz-clock                          0        0        0    27000000          0     0  50000         Y
 otg                                  0        0        0   480000000          0     0  50000         Y
 osc                                  4        4        1    54000000          0     0  50000         Y
    tsens                             0        0        0     3375000          0     0  50000         Y
    otp                               0        0        0    13500000          0     0  50000         Y
    timer                             0        0        0     1000000          0     0  50000         Y
    plld                              5        5        0  3000000091          0     0  50000         Y
       plld_dsi1                      1        1        0   750000023          0     0  50000         Y
       plld_dsi0                      1        1        0    11718751          0     0  50000         Y
       plld_per                       3        3        0   750000023          0     0  50000         Y
          emmc2                       1        1        0   100000003          0     0  50000         Y
          dsi1e                       0        0        0   100000003          0     0  50000         Y
          emmc                        0        0        0   250000007          0     0  50000         Y
          uart                        1        1        0    48000001          0     0  50000         Y
       plld_core                      1        1        0   600000019          0     0  50000         Y
    pllc                              5        5        0  2592000000          0     0  50000         Y
       pllc_per                       1        1        0   648000000          0     0  50000         Y
       pllc_core2                     1        1        0    10125000          0     0  50000         Y
       pllc_core1                     1        1        0    10125000          0     0  50000         Y
       pllc_core0                     1        1        0    10125000          0     0  50000         Y
    pllb                              2        2        0  2999999988          0     0  50000         Y
       pllb_arm                       1        1        0  1499999994          0     0  50000         Y
    plla                              4        4        1  2999999988          0     0  50000         Y
       plla_ccp2                      1        1        0    11718750          0     0  50000         Y
       plla_dsi0                      1        1        0    11718750          0     0  50000         Y
       plla_core                      2        2        1   499999998          0     0  50000         Y
          h264                        0        0        0   249999999          0     0  50000         Y
          isp                         0        0        0   249999999          0     0  50000         Y
          vpu                         3        3        1   500000000          0     0  50000         Y
             fe804000.i2c_div         1        1        1      100000          0     0  50000         Y
             aux_spi2                 0        0        0   500000000          0     0  50000         N
             aux_spi1                 0        0        0   500000000          0     0  50000         N
             aux_uart                 0        0        0   500000000          0     0  50000         N
             peri_image               0        0        0   500000000          0     0  50000         Y
 dsi1p                                0        0        0           0          0     0  50000         Y
 dsi0p                                0        0        0           0          0     0  50000         Y
 dsi0e                                0        0        0           0          0     0  50000         Y
 cam1                                 0        0        0           0          0     0  50000         Y
 cam0                                 0        0        0           0          0     0  50000         Y
 dpi                                  0        0        0           0          0     0  50000         Y
 tec                                  0        0        0           0          0     0  50000         Y
 smi                                  0        0        0           0          0     0  50000         Y
 slim                                 0        0        0           0          0     0  50000         Y
 gp2                                  0        0        0           0          0     0  50000         Y
 gp1                                  0        0        0           0          0     0  50000         Y
 gp0                                  0        0        0           0          0     0  50000         Y
 dft                                  0        0        0           0          0     0  50000         Y
 aveo                                 0        0        0           0          0     0  50000         Y
 pcm                                  0        0        0           0          0     0  50000         Y
 pwm                                  0        0        0           0          0     0  50000         Y
 sdram                                0        0        0           0          0     0  50000         Y
 hsm                                  0        0        0           0          0     0  50000         Y
volumio@volumio:~$

When it doesn’t work, I found that if I disable I2C in options and re-enable it by selecting the DAC model it starts to work

The restart doesn’t always work, sometimes the screen remains black, but when the restart works the DAC plays correctly

Hey @Itolo,

Interesting, I don’t think that clocks are honoured. Don’t see dsi1e (we are on 6.1.69 kernel)

What are values from:

sudo cat /sys/kernel/debug/clk/fe804000.i2c_div/clk_duty_cycle
sudo cat /sys/kernel/debug/clk/fe804000.i2c_div/clk_max_rate
sudo cat /sys/kernel/debug/clk/fe804000.i2c_div/clk_notifier_count
sudo cat /sys/kernel/debug/clk/fe804000.i2c_div/clk_prepare_count
sudo cat /sys/kernel/debug/clk/fe804000.i2c_div/clk_protect_count

Kind Regards,

Hi @nerd

In working and non-working scenario?

This should be:

  "mixer_type": {
    "type": "string",
    "value": "Hardware"
  },
  "mixer": {
    "type": "string",
    "value": "DAC"
  },

Happens when card1 becomes “unresolved”. Interesting.

I think this is all about clocks.

Kind Regards,

1 Like

Should not matter.

This will be handled by your Pi SoC.

Kind Regards,

This is not only with the HifiBerry DAC2 HD, same goes for the HifiBerry DAC2 as reported earlier

Working

volumio@volumio:~$ sudo cat /sys/kernel/debug/clk/fe804000.i2c_div/clk_duty_cycl                                                          e

We trust you have received the usual lecture from the local System
Administrator. It usually boils down to these three things:

    #1) Respect the privacy of others.
    #2) Think before you type.
    #3) With great power comes great responsibility.

[sudo] password for volumio:
1/2

volumio@volumio:~$ sudo cat /sys/kernel/debug/clk/fe804000.i2c_div/clk_max_rate
4294967295
volumio@volumio:~$
volumio@volumio:~$ volumio@volumio:~$sudo cat /sys/kernel/debug/clk/fe804000.i2c_div/clk_notifier_count
-bash: volumio@volumio:~: command not found
volumio@volumio:~$

volumio@volumio:~$ sudo cat /sys/kernel/debug/clk/fe804000.i2c_div/clk_prepare_count
1
volumio@volumio:~$

volumio@volumio:~$ sudo cat /sys/kernel/debug/clk/fe804000.i2c_div/clk_protect_count
1
volumio@volumio:~$

Thank you

1 Like

Hey @Itolo,

Unexpected.

Right, i2c/buses seem loosing sync notifier. Let’s apply strict transfer rate to i2c bus.

In your /boot/config.txt change:

dtparam=i2c_arm=on

to

dtparam=i2c_arm=on,i2c_arm_baudrate=1000000

Kind Regards,

Hey @Wheaten,

It seems that HifiBerry world shares the same duty cycle.

Their forums are quite secretive about kernel 6.1.xx. No wonder why.

Kind Regards,

euh, not clue why :joy:

hi @Nerd
I turned it off and on again 8 times and it works perfectly. But at every start there is a knock on the speakers. Volumio warns me that the configuration has changed and the player is ready

@Itolo,

Power down or reboot should be consistent. Please verify.

Consider reducing startup volume. By default the “tap is open” 100%.

This behaviour is expected.

Kind Regards,

Power down or reboot workink 100% but unfortunately during a reboot it reappeared alsa error

Thank you

Hey @Itolo,

Please post the log from the occurrence of:

Kind Regards,

Ho @Nerd

Okay today i attach the log. I have the possibility to try the DAC on a PI3, should i proceed?

Thank you