Audio/Video sync problem

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I don’t know if this is a Volumio problem, I doubt it, but I have been racking my brain and for the life of me, I don’t even know where to start so I’m asking here. Maybe somebody can point me in the right direction. Sorry in advance if this is outside the realm of “help and support” regarding Volumio.

So here’s my issue. I built an Ian Canada Streamer/DAC. Almost identical to this. Flagship Full function SYNC Clock mode DAC KITs – IanCanada

So I installed his Reciever DDC so I could use this DAC for my Oppo 103, but I have a really bad video/audio sync issue, and it’s so bad the sync option in the Oppo doesn’t even come close. I’m also having an issue getting the DAC to lock on to anything above 44.1 kHz in Tidal. I had narrowed it down to an GPIO causing that issue, and had it fixed, but I upgraded the output stage, and when I did that the sync issue went away. Then, while I was checking connections and so worth I cycled the power on and off, and the sound stopped outputting. That turned out to be an accidental setting I had done in the Monitor Pi Pro, and when I reset to factory settings sound came back, but now I have the delay issue again, and it’s stopped locking on to anything above 44.1

This weekend I am going to take the Pi out of the stack, I can run it to my OPPO without it, and see if that does anything with the sync issue. If so, I think I’ll try a Pi3 or 4. I’m using a Pi5 BTW.

Any way, thanks for reading.

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Where (and how) to start the fault-finding

Because the Ian Canada stack is made of several independent modules, the quickest way to isolate the fault is to test one block at a time and watch what the FIFO/MonitorPi reports.

Block Quick test What a fault looks like
1. Source → ReceiverPi / DDC Feed it directly from the OPPO without the Pi. MonitorPi should show the incoming rate switching between 44.1 / 48 / 96 kHz as you change discs or files. If it never shows ≥ 48 kHz the problem is upstream (bad cable, wrong OPPO setting, or the ReceiverPi’s jumper on the “44.1 family only” pin).
2. ReceiverPi → FifoPi With only those two boards powered, monitor the lock lamps on the FIFO clock board (green = 44.1 family, red = 48 family). No lock on the red oscillator → 24.576 MHz clock not getting power, or SEL-line stuck.
3. FifoPi → DAC → I-V/output stage Leave the FIFO in “sync” (minimal) latency—DIP switch 1 = ON on most Ian boards—and play a 1 kHz test tone. If the DAC outputs 44.1 kHz fine but unlocks at 48/96 kHz the MCLK path is broken or the GPIO SEL from the ReceiverPi is missing.
4. Pi → FifoPi path Re-insert the Pi (Pi 5) but still keep the OPPO disconnected. Use Volumio → Playback Options → Test Audio (or play a 96 kHz WAV). If the FIFO locks at 96 kHz here, but not when the OPPO is the source, the ReceiverPi wiring or its switch logic is the culprit.

1 | Lip-sync delay (video ahead of audio)

  1. FIFO latency setting
    All Ian Canada FIFOs ship with “normal” latency (hundreds of ms).

    • DIP-switch 1 (or “Latency” jumper) must be ON for “AV Low Latency Mode.”

      • This reduces the buffer to ≈ 0.7 ms, small enough for an OPPO’s ±100 ms A/V delay menu to catch.

    • After the factory reset of the MonitorPi you did, that switch was probably returned to “Off,” giving you the long delay again.

  2. OPPO’s A/V Sync menu
    The 103 will only delay the audio, never the video. If your FIFO is already adding 300 ms of audio delay, the OPPO can’t “go negative” to compensate—you must shorten the FIFO first.

  3. Check what the MonitorPi reports

    • Press the Info button until it shows “Buffer = xxx ms.”
    • In AV-Low-Latency it should read < 2 ms.
      If you still see tens or hundreds of ms, change the DIP or the rotary-switch on the FifoPi, then power-cycle the whole stack.

2 | No lock above 44.1 kHz

Almost always one of these three:

Likely cause Quick check Fix
24.576 MHz oscillator not powered Only the 45.1584 MHz LED lights on the clock board. Reseat the clock hat; make sure JP2/JP3 (clock enable) jumpers on the FifoPi are both fitted.
SEL (rate-family) line from the ReceiverPi / Pi GPIO is stuck With a 48 kHz file playing, measure SEL-pin on the DAC board—it should be HIGH (3.3 V). Trace the line: ReceiverPi → FifoPi → DAC. A loose DuPont or wrong GPIO assignment in the Pi overlay will keep it LOW.
ReceiverPi in “44.1 family only” mode On most ReceiverPi boards, JP1 (or SW1-3) selects 44-only vs both families. Move the jumper to “both” (or ON=both families) and power-cycle.

Extra Pi-side check (when the Pi is the source)
aplay -D hw:0,0 -r 96000 -f S16_LE /dev/zero
If the FIFO locks at 96 kHz then, the clock hardware is fine and the trouble is 100 % in the ReceiverPi path from the OPPO.

3 | Why cycling power “fixed” then “broke” the delay

  • Powering the stack off/on after you changed the output-stage board probably re-initialised the FIFO in “fast” mode (short buffer), so lip-sync looked OK.
  • Resetting the MonitorPi to factory defaults restores the FifoPi’s default long buffer. Turn the latency DIP back ON (or set Config → Latency = Short on the MonitorPi’s menu).

4 | What to try this weekend

  1. Run the ReceiverPi → Fifo → DAC stack on bench power, no Pi

    • From the OPPO coax/toslink feed see if you get green/red lock lamps at 44.1 and 48 kHz.
    • If it fails at 48 kHz, the Pi is innocent; focus on ReceiverPi jumpers and clock power.

  2. Swap the Pi 5 for any Pi 3 or 4 only after the above passes.
    Pi 5 uses the new i2s_gen overlay and can expose SEL on a different GPIO. Volumio 3.812’s kernel sometimes defaults that pin LOW. A Pi 3/4 running the standard hifiberry-dac overlay gives a known-good SEL signal (GPIO6) that the FifoPi already expects.

  3. Use Ian’s FIFO firmware “video mode” (if you have the latest STM32 firmware).
    The web-config page lets you set AV Mode without the DIP. That stores in EEPROM, so it survives MonitorPi resets.

5 | If you need Volumio logs

ssh volumio@<Pi_IP>   # password volumio
sudo journalctl -u volumio -n 200     # core Volumio service
sudo tail -n 100 /var/log/mpd.log     # MPD stream / sample-rate info
dmesg | grep -i i2s                   # kernel overlay / GPIO lines

Copy the part where you play a 96 kHz track and the FIFO refuses to lock—look for “failed to set format 0x…” or “pcm512x… no BCLK.”

Quick checklist (TL;DR)

Symptom One-line fix
Lip-sync way off Set FIFO latency DIP 1 = ON (or MonitorPi → Latency = Short) and reboot.
Locks only at 44.1 kHz Make sure the 24.576 MHz oscillator LED is on
and JP1/SEL line toggles HIGH with 48 kHz material.
Only after factory reset Re-visit all MonitorPi → System Settings; reset clock family = “Both”, latency = “AV”.

Do those three, and 90 % of Ian-Canada “won’t lock / big delay” reports disappear. If anything still misbehaves after that, post the FIFO lock LEDs, MonitorPi buffer readout, and the kernel/I²S lines from the logs and we can drill deeper. Good luck!